By Gerald Gerlach (auth.), Gerald Gerlach, Klaus-Jürgen Wolter (eds.)
This booklet discusses destiny tendencies and advancements in electron equipment packaging and the possibilities of nano and bio recommendations as destiny ideas. It describes the influence of nano-sized debris and cell-based ways for packaging suggestions with their diversified standards. It deals a complete evaluation of nano debris and nano composites and their software as packaging services in electron units. the significance and demanding situations of third-dimensional layout and desktop modeling in nano packaging is mentioned; additionally methods for implementation are defined. options for unconventional packaging recommendations for metallizations and functionalized surfaces in addition to new packaging applied sciences with excessive power for commercial functions are mentioned. The booklet brings jointly a entire review of nano scale elements and structures comprising digital, mechanical and optical constructions and serves as very important reference for commercial and educational researchers.
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Additional info for Bio and Nano Packaging Techniques for Electron Devices: Advances in Electronic Device Packaging
Dig. pp. 381–384 (1993) 19. : Packaging design of microsystems and meso-scale devices. IEEE Trans. Adv. Packag. 23(4), 596–601 (2000) 20. : Automated packaging of semiconductors. Patent US 3,440,027 (April 22, 1969) 21. : Halbleiterverstärker. Patent DE 833,366 (May 15, 1952). 22. : Analysis of packaging and sealing techniques for microelectronic modules and recent advances. Microelectronics International 16(2), 8–12 (1999) 23. : Miniaturized electronic circuits. Patent US 3,138,743 (June 23, 1964) 24.
W. Chapman, D. Long)  First multichip multilayer ceramic substrate by IBM (B. Schwartz, D. Wilcox, R. Tummala) based upon the invention of the “via” (H. E. Moore formulates “Moore’s law”: Chip capacity doubles each year. Moore later refined the period to two years.  Dual-in-Line (DIL) packages with 14 leads invented (B. Rogers, Fairchild), implemented by Texas Instruments  (continued). 12 (continued). C. A. Wickstrom; Westinghouse)  Invention of Tape Automated Bonding (TAB) (F. A.
As in the wafer-on-wafer method, wafer thinning and through-silicon via creation are performed on the single-wafer level or after bonding the dies to the silicon wafer substrate. • Stacking of dies (die on die, respectively): Electronic components are built on multiple dies, which are then aligned and bonded. 3D ICs offer many significant benefits: • Lower volume, less footprint: More functionality fits into a smaller space. This extends Moore’s Law. • Increased speed: The average wire length becomes shorter.